// Valid pre-DR2229
struct SCKDIVCR {
    volatile uint32_t PCKD : 3; // [00-02] Peripheral Module Clock D (PCLKD) Select
    volatile uint32_t      : 1; // [03-03] RESERVED
    volatile uint32_t PCKC : 3; // [04-06] Peripheral Module Clock C (PCLKC) Select
    volatile uint32_t      : 1; // [07-07] RESERVED
    volatile uint32_t PCKB : 3; // [08-10] Peripheral Module Clock B (PCLKB) Select
    volatile uint32_t      : 1; // [09-09] RESERVED
    volatile uint32_t PCKA : 3; // [12-14] Peripheral Module Clock A (PCLKA) Select
    volatile uint32_t      : 1; // [13-13] RESERVED
    volatile uint32_t BCK  : 3; // [16-18] External Bus Clock (BCLK) Select
    volatile uint32_t      : 5; // [19-25] RESERVED
    volatile uint32_t ICK  : 3; // [24-26] System Clock (ICLK) Select
    volatile uint32_t      : 1; // [27-27] RESERVED
    volatile uint32_t FCK  : 3; // [28-30] Flash IF Clock (FCLK) Select
    volatile uint32_t      : 1; // [31-31] RESERVED
};


// Valid post-DR2229
struct SCKDIVCR {
    volatile uint32_t PCKD : 3; // [00-02] Peripheral Module Clock D (PCLKD) Select
             uint32_t      : 1; // [03-03] RESERVED
    volatile uint32_t PCKC : 3; // [04-06] Peripheral Module Clock C (PCLKC) Select
             uint32_t      : 1; // [07-07] RESERVED
    volatile uint32_t PCKB : 3; // [08-10] Peripheral Module Clock B (PCLKB) Select
             uint32_t      : 1; // [09-09] RESERVED
    volatile uint32_t PCKA : 3; // [12-14] Peripheral Module Clock A (PCLKA) Select
             uint32_t      : 1; // [13-13] RESERVED
    volatile uint32_t BCK  : 3; // [16-18] External Bus Clock (BCLK) Select
             uint32_t      : 5; // [19-25] RESERVED
    volatile uint32_t ICK  : 3; // [24-26] System Clock (ICLK) Select
             uint32_t      : 1; // [27-27] RESERVED
    volatile uint32_t FCK  : 3; // [28-30] Flash IF Clock (FCLK) Select
             uint32_t      : 1; // [31-31] RESERVED
};